The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC design and material have produced generations of ICs where each generation has smaller and more complex circuits than previous generations.
When fabricating integrated circuits, various features such as metal lines are formed into a semiconductor substrate. To form these features, photo-masks are used to form a pattern into a photo-resist layer. The regions where the photo-resist layer is removed expose the underlying substrate to an etching process used to form trenches where metal is subsequently placed.
As the patterns formed into photoresist layers become increasingly dense, challenges rise to overcome adverse impacts of misalignment or irregularities/distortions of patterns in photoresist layers during formation of various features in the semiconductor substrate.